Curious... Ferrite material on top of chips has been done many times in the past but I don't doubt that it was never patented before for your specific application. It might help control RFI if you provide enough shielding; it could also help control EMI by reducing edge speeds to/from the chips. It could also make them run hotter, slowing CMOS chips down somewhat (and speeding up bipolar chips).
I wonder how much RFI actually is captured from outside a chassis, since it is typically shielded (most components are in metal boxes). I suspect shielding specific chips from RFI/EMI within the box could be helpful...
Increased amplitude could improve performance if the rise time stays the same, providing a higher slew rate. That would tend to open the width of the eye. Of course, higher slew rates generate more RFI... I would love to see before and after eyes -- that shouldn't give away any secrets and could show definitively the benefits of shielding (plus whatever). I suppose the catch is the BER may be so small it doesn't matter (and then we can debate the definitions of "small" and "doesn't matter").
I wonder how much RFI actually is captured from outside a chassis, since it is typically shielded (most components are in metal boxes). I suspect shielding specific chips from RFI/EMI within the box could be helpful...
Increased amplitude could improve performance if the rise time stays the same, providing a higher slew rate. That would tend to open the width of the eye. Of course, higher slew rates generate more RFI... I would love to see before and after eyes -- that shouldn't give away any secrets and could show definitively the benefits of shielding (plus whatever). I suppose the catch is the BER may be so small it doesn't matter (and then we can debate the definitions of "small" and "doesn't matter").