I've been very happy with my UpTone Audio etherregen. Great little device, especially with an external clock which the sonic benefits are clearly audible.
No. Not in ethernet which is asynchronous by nature. If you can hear a difference by using a different/better clock in the ethernet domain, and it id evident that many do, it is not because of lower jitter = improved timing. It is most likely to do with the higher quality circuitry in the external clock being lower noise.
Jitter in ethernet refers to variability in the timing of the arrival of packets of data; it's a concern in overloaded corporate networks because at extremes it can lead to data transmission issues. It is not the same jitter we speak of once we unpack these data packets - after the 7-layer OSI ethernet model has done its job of ensuring the data arrives uncorrupted, with error correction and retransmission as necessary, At this point our streamer has unpacked the data packets/frames into a continuous bitstream for onward transmission to the DAC and clock accuracy is vitally important to sound quality in the (post-unpacking bit of a) streamer and in the DAC - but not before.
Extrapolation from the synchronous post-streamer world to the asynchronous pre-streamer world is inappropriate and unhelpful. Customers shouldn't need to understand this stuff but manufacturers operating in the pre-streamer domain have a duty to.
I'm with Hans's correction/retraction as referred to above. Isolation in the pre-streamer domain absolutely yes; noise reduction in the pre-streamer domain (including lower noise clocks) absolutely yes; clock accuracy in the pre-streamer domain absolutely no.
I'm with Hans's correction/retraction as referred to above. Isolation in the pre-streamer domain absolutely yes; noise reduction in the pre-streamer domain (including lower noise clocks) absolutely yes; clock accuracy in the pre-streamer domain absolutely no.
I'm not sure why, despite our repeated explanations, so many people keep missing what we have been saying:
The mechanisms by which jitter/phase-noise on packet-data interfaces (Ethernet, USB, etc.) has an impact on the jitter/phase-noise at the DAC's master clock pin is indirect. It is not about the bits or the jitter of the data--it is about the jitter/phase-noise generated throughout the chain, by the chips themselves, by the power networks, and by the clocks. Amplitude noise and phase-noise convert back and forth, and ANY resultant ground-plane noise (common-mode and not simply "filtered out") will make its way to the DAC's master clock input pin.
The stuff we are talking about is NOT any sort of "fringe" science. These are real factors that microwave RF engineers deal with all the time. It is also the very sort of thing that my partner John Swenson dealt with in the microscopic design of large-scale custom ASICs and PHYs for decades.
Proper measurement--with a high-speed differential probe and a cross-correlation phase-noise analyzer attached to the DAC master clock pin--readily shows variations caused by changes in upstream elements of packet data interfaces (USB, Ethernet, etc.), including clocking.